XTS-0812 is a LQFP176 E-PAD, high-performance 8+2-port Gigabit Ethernet switch. It integrates eight PHY ports support 1000Base-T/100Base-TX/10Base-Te,two extra MAC ports for specific applications which supports 2500BX/SGMII/1000Base-X/100Base-FX/RGMII/MII/RMII. XTS-0812 is also embedded with a RISC-V microprocessor.

The integrated Giga-PHY complies with 10Base-Te, 100Base-TX, and 1000Base-T IEEE standard 802.3 and also support Xtramus proprietary LRE100-4 feature, which makes the device can auto-negotiate and link up with LRE100-4 compliant link partners, in extended cable length applications up to 400 meters at 100Mbps over CAT5E cable.

The Extension GMAC1 and Extension GMAC2 of the XTS-0812 supports xMII or SerDes connecting with an external PHY, MAC, external CPU or RISC in specific applications. The xMII refer to Reduced Gigabit Media Independent Interface (RGMII), Media Independent Interface (MII), and Reduced Media Independent Interface (RMII). The SerDes supports IEEE 100Base-FX, IEEE 1000Base-X and IEEE 2500Base-X.

XTS-0812 integrates a 4K look-up table with an efficient hashing algorithm for address searching and learning, each entry also can be configured as a static entry.

XTS-0812 supports IEEE 802.1Q VLAN and has a 4K-entry VLAN table. It provides VLAN classification according to port-based, protocol -based, VLAN translation, Flow-based capability，and MAC-based, IP-subnet-based VLAN can be supported by configuration  It also supports IVL, SVL, and IVL/SVL for flexible network topology architecture.

The XTS-0812 supports standard 802.3x flow control frames for full duplex, and optional backpressure for half duplex. It determines when to invoke the flow control mechanism by checking the availability of system resources. The XTS-0812 supports storm control.

In order to support flexible traffic classification, the XTS-0812 supports 383-hardware entry ACL rules check and multiple actions options. The 383 entries are composed of 48 rows, each row has 8 entries. To support long rule, rule extension is supported by any combinations of the 8 entries for each row. Each port can optionally enable or disable the ACL rule check function. The ACL rule key can be based on packet physical port, Layer2, Layer3, and Layer4 information. The ACL action can be configured as Drop/Permit/Redirect/ Mirror, change priority/DSCP value in 802.1q, and rate policing when an ACL rule matches.

·  High performance, nonblocking, 10 ports Ethernet Switch integrating:

    ■ Eight 1000Base-T/100Base-TX/10Base-Te PHY

    ■ Two SerDes interfaces for 2500Base-X/SGMII/1000Base-X/100Base-FX

    ■ Two RGMII/MII/RMII interfaces

·  PHY Transceiver

    ■ Each PHY supports 10/100/1000M full duplex mode (half duplex only supports in 10/100M mode)

    ■ Full duplex operation with IEEE 802.3x flow control and half duplex operation with backpressure

    ■ Each PHY supports Advanced Cable Status Diagnostic (CSD)

    ■ Each PHY supports Xtramus proprietary LRE100-4 feature

·  Advanced Features

    ■ Supports parallel LED or serial LED outputs

    ■ Supports SPI/SMI/I2C Slave interface for external CPU

    ■ Supports SMI/I2C Master interface

    ■ Supports 1 interrupt output to external CPU for notification

    ■ Supports 64K-byte EEPROM space for configuration

    ■ Link On Cable Length Power Saving

    ■ Link Down Power Saving

    ■ Supports 9K byte jumbo frames

·  Supports 2 IEEE 802.3ad Link aggregation groups

·  Security Filtering

    ■ Supports Disable learning for each port

    ■ Supports Disable learning-table aging for each port

    ■ Supports Unknown DA filter mask

    ■ Supports Port Isolation

    ■ Supports Broadcast/Multicast/Unknown DA storm control protects system from attack by hackers

    ■ Supports DOS attack prevent

·  Control, Management and Statistics

    ■ Supports RFC MIB Counters

       - MIB-II (RFC 1213)

       - Ethernet-Like MIB (RFC 3635)

       - Interface Group MIB (RFC 2863)

       - RMON (RFC 2819)

       - Bridge MIB (RFC 1493)

       - Bridge MIB Extension (RFC 2674)

    ■ Supports OAM and EEE LLDP (Energy Efficient Ethernet Link Layer Discovery Protocol)

    ■ Supports Loop Detection

·  Packet Process Engine

    ■ Supports 4k 802.1Q VLANs

    ■ Supports VLAN policing and VLAN forwarding decision

    ■ Supports Port based, Tag based, and Protocol based VLAN

    ■ Supports per port egress VLAN tagging and untagging

    ■ Supports IEEE 802.1D/s/w Spanning Tree Protocols

    ■ Supports Multicast VLAN (MVR)

    ■ Supports IVL, SVL, and IVL/SVL

    ■ Supports IEEE 802.1ad Stacking VLAN

    ■ Supports VLAN translation (1:1/2:1/2:2/ N:1/1:N)

    ■ Supports IEEE 802.1x Access Control Protocol

       - Port-Based Access Control

       - MAC-Based Access Control

       - Guest VLAN

    ■ Supports ACL Rules

    ■ Supports Hardware/Software IGMP/ MLD Snooping

       - Supports Fast Leave

       - Supports IGMP v1/v2

       - Static/Dynamic Router port

    ■ Mirror

       - Port based mirror

       - Flow based mirror

    ■ Supports reserved multicast control

    ■ Supports WOL

·  Quality of Service (QoS)

    ■ Supports Queue based DWRR/SP, packet/byte modes are both supported for DWRR

    ■ Supports min-max queue based shaping, packet/byte modes are both supported

    ■ Supports single token bucket for port based shaping, packet/byte modes are both supported

    ■ Supports per port Input Bandwidth Control, packet/byte modes are both supported

    ■ trTCM color aware/blind packet/byte modes

    ■ Traffic classification based on multiple source types

    ■ Supports 8 unicast queues and 4 multicast queues for each port

    ■ Tail drop is supported for UQ/MQ, WRED is supported for UQ

·  Microprocessor

    ■ Integrated RISC-V microprocessor

    ■ Supports Flash Interface (Dual mode/Single mode)

    ■ Supports code execution (XIP) directly from SPI Flash

·  25MHz crystal or 3.3V OSC input

·  LQFP 176-pin E-PAD package